Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/5/84; site mordor.UUCP Path: utzoo!watmath!clyde!cbosgd!ihnp4!mhuxn!mhuxr!ulysses!gamma!epsilon!zeta!sabre!bellcore!decvax!genrad!panda!talcott!harvard!seismo!ut-sally!mordor!@S1-A.ARPA,@MIT-MC.ARPA:JOSH%YKTVMH.BITNET@WISCVM.ARPA From: @S1-A.ARPA,@MIT-MC.ARPA:JOSH%YKTVMH.BITNET@WISCVM.ARPA Newsgroups: net.space Subject: Space Shuttle Computers Message-ID: <2347@mordor.UUCP> Date: Thu, 20-Jun-85 21:58:38 EDT Article-I.D.: mordor.2347 Posted: Thu Jun 20 21:58:38 1985 Date-Received: Sun, 23-Jun-85 07:08:06 EDT Sender: daemon@mordor.UUCP Lines: 52 From: Josh Knight The September 1984 Issue of Communications of the ACM had a case study of the Space Shuttle primary computer system and a special section on on computing in space. The following excerpt from the (copyright ACM) case study article "The Space Shuttle Primary Computer System" by Alfred Spector and David Gifford, is a response by Tony Macina of IBM to the question by Al Spector "Can you give us some more detailed information about the Shuttle computers?": "A single computer (GPC) is made up of two packages, a CPU unit and an I/O device unit (IOP), with a total of 106K 32 bit words of memory. The CPU, a System/4 Pi, Model AP-101 manufactured by IBM is an off-the-shelf processor and has probably been around for 10 or 12 years. Our original contract specified that we use off-the- shelf hardware as much as possible. The 4 Pi design has been used in a number of other aerospace vehicles. For example, certain B-52 aircraft an the B-1 Bomber use 4 Pi technology. "The IOP was specially built and designed for the Shuttle, using 4 Pi technology. It contains 24 "time-sliced" processors that handle the data buses on the Shuttle. The IOP obtains its instructions from the main memory and is actually in contention with the CPU for memory access." Further responses indicate that the main memory is ferrite core (non- volatility is cited as an advantage of this old implementation), that the CPU processes 450,000 instructions/second and that the CPU/IOP combination weighs about 120 pounds. To control flight surfaces each of the 4 (hopefully) identical computers send independent commands on independent buses to independent actuators and what happens to the control surfaces is controlled by a HYDRAULIC "voting" mechanism. The articles in the special section on computing in space are: "Development and Application of NASA's First Standard Spacecraft Computer" by C.E. Trevathan, T.D. Taylor, R.G. Hartenstein, A.C. Merwarth and W.N. Stewart "Design, Devlopment, Integration: Space Shuttle Primary Flight Software System" by W.A. Madden and K.Y. Rone "Architecture of the Space Shuttle Primary Avionics Software System" by G.D. Carlow Of course, any opinions, expressed or implied are mine and not my employers... Josh Knight IBM T.J. Watson Research Center josh@yktvmh.BITNET, josh.yktvmh.ibm-sj@csnet-relay.ARPA