Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site gcc-bill.ARPA Path: utzoo!linus!philabs!cmcl2!seismo!harvard!gcc-bill!brad From: brad@gcc-bill.ARPA (Brad Parker) Newsgroups: net.arch Subject: Re: Cache revisited Message-ID: <268@gcc-bill.ARPA> Date: Mon, 22-Jul-85 16:47:16 EDT Article-I.D.: gcc-bill.268 Posted: Mon Jul 22 16:47:16 1985 Date-Received: Wed, 24-Jul-85 07:42:59 EDT References: <5374@fortune.UUCP> Reply-To: brad@gcc-bill.UUCP (Brad Parker) Distribution: net Organization: General Computer Company, Cambridge Ma (Home of the HyperDrive) Lines: 35 Jim Walls question seems like a good one. Unfortunetly, it only leads me to as another... (please excuse the horrible spelling) Could someone who has a decent understanding of memory management systems give me a short discourse on the following? I'd like to compare and contrast the difference in performance between a simple single level paged memory manager using a ram (a la Sage 68000) and a system like the IBM DAT box, where the page tables are stored in main memory and cached in hardware. The point being that switching context is MUCH faster if you only need to change the pointer to the page tables, rather than copy 8K of paging information into the page table ram. It is assummed that the cache used to speed up the main memory page table accesses is sufficiently large to get a good hit rate (what ever that may be). Elaboration: The simple hardware system is a ram which uses as it's address the upper part of the access address with the lower part of the access address concatenated to the contents of the ram - additionally you'd need some flag ram used to mark pages swapped out (no doubt generating a page fault interupt). The main memory system would need a state machine to access the page tables from main memory and some sort of nifty cache to keep the most recently accessed translations around - this is more or less similar to the hardware version except the page tables are in main memory, not in dedicated ram. The goal is to allow for simple hardware without an huge overhead in context switching. Any ideas? -- J Bradford Parker uucp: seismo!harvard!gcc-bill!brad "She said you know how to spell AUDACIOUSLY? I could tell I was in love... You want to go to heaven? or would you rather not be saved?" - Lloyd Coal