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From: doug@terak.UUCP (Doug Pardee)
Newsgroups: net.arch
Subject: Re: Re: RISC (really on multiplication d
Message-ID: <646@terak.UUCP>
Date: Tue, 23-Jul-85 14:03:57 EDT
Article-I.D.: terak.646
Posted: Tue Jul 23 14:03:57 1985
Date-Received: Thu, 25-Jul-85 23:21:19 EDT
References: <149@mips.UUCP> <600005@pbear.UUCP> <493@mmintl.UUCP>
Organization: Terak Corporation, Scottsdale, AZ, USA
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> But hardware multiplies invariably generate a two word result, leaving the
> high-order word to be allowed for and/or disposed of.  This is a problem
> equally for compilers and hand-written assembler code.
> 
> The same problem occurs for division.

National's NS320xx CPUs do byte*byte->byte, word*word->word, and
long*long->long multiplication (and division) as the normal cases.

They also have "extended" multiply and divide instructions with the
"conventional" double-length product/dividend, but these are a bit more
difficult to use because they are oriented toward extended-precision
arithmetic (for example, these are strictly unsigned operations).

> Incidently, re the subscript computation problem, why not a command which
> multiplies a word by a one-byte constant? ...

The NS320xx instruction set includes the INDEX instruction, which 
multiplies a subscript value by a length and adds the result to a
register.  The length can be contained in a register or memory or
can be a constant, and can be 8, 16, or 32 bits long (unsigned).
The catch is that it must be the same length as the subscript.
-- 
Doug Pardee -- Terak Corp. -- !{ihnp4,seismo,decvax}!noao!terak!doug
               ^^^^^--- soon to be CalComp