Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: $Revision: 1.6.2.16 $; site datacube.UUCP Path: utzoo!linus!philabs!cmcl2!seismo!harvard!think!datacube!shep From: shep@datacube.UUCP Newsgroups: net.graphics Subject: Re: Orphaned Response Message-ID: <6700022@datacube.UUCP> Date: Sun, 28-Jul-85 15:04:00 EDT Article-I.D.: datacube.6700022 Posted: Sun Jul 28 15:04:00 1985 Date-Received: Thu, 1-Aug-85 06:53:31 EDT References: <10570@rochester.UUCP> Lines: 51 Nf-ID: #R:rochester:-1057000:datacube:6700022:177600:2588 Nf-From: datacube!shep Jul 28 15:04:00 1985 rochester!sher wrote: >I have recently completed a TR studying the effect of differing >architectures on low-level computer vision. I compared the CMU WARP >and the BBN Butterfly. The interpretation task was pattern >recognition using convolution based techniques on edge images. >The architectural features that effected the choice of implementation >of the routines were in order of importance: >1. Relative speeds of instructions (floating point vs fixed point vs >memory access) >2. Local memory available per processor >3. Interconnection net between processors >Actually the effect of the interconnection net was completely masked >by the first two issues. My research thus indicates that the >interconnection net is not a significant issue as far as architectures >for computer vision are concerned. I argue that the interconnection network between processors -is- the critical link in some machine vision architectures. A good article, "Computer Architectures for Pictorial Information Systems" appeared in November 1981 IEEE Computer. In that article, the dimensions of parallelism in image processing was explored. Simply put, parallelism in image processing may be broken down into: - Operator Parallelism - Image Parallelism - Neighborhood Parallelism - Pixel-bit Parallelism I am not familiar with the two architectures (CMU WARP, BBN Butterfly) mentioned. But your results suggest that these architectures have most of any parallelism along the "image" axis. If this is in fact the case, I would agree totally with your findings. Out along the other dimensions of parallelism, the interconnection issue becomes critical. An operator parallel intensive architecture requires small amounts of local processor storage, but has a high input and output bandwidth requirement due to its pipelined nature. My personal design bias has long favored operator parallel techniques. (shep == "Should Have Everything Pipelined") Since there are so many different ways of addressing the "low-level" image processing tasks that underlie the scene segmentation issues, it would be foolish lock into a particular "religion" for these tasks. Instead, I feel an open approach must be taken while we explore different architectures, and evaluate their performance. Shep Siegel ihnp4!datacube!shep Datacube Inc. ima!inmet!mirror!datacube!shep 617-535-6644 decvax!cca!mirror!datacube!shep 4 Dearborn Rd. decvax!genrad!wjh12!mirror!datacube!shep Peabody, Ma. 01960 {mit-eddie,cyb0vax}!mirror!datacube!shep