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From: jans@mako.UUCP (Jan Steinman)
Newsgroups: net.micro.68k,net.micro.16k
Subject: Re: PDP11s vs the micros
Message-ID: <861@mako.UUCP>
Date: Thu, 18-Jul-85 04:18:57 EDT
Article-I.D.: mako.861
Posted: Thu Jul 18 04:18:57 1985
Date-Received: Sun, 21-Jul-85 02:22:25 EDT
References: <1617@hao.UUCP> <847@mako.UUCP> <2422@sun.uucp>
Reply-To: jans@mako.UUCP (Jan Steinman)
Organization: Tektronix, Wilsonville OR
Lines: 29
Xref: linus net.micro.68k:959 net.micro.16k:322

In article <2422@sun.uucp> gnu@sun.uucp (John Gilmore) writes:
>>(me, as qoted by John Gilmore)
>> My only wish is that Nati had given all the general purpose registers this
>> facility, so I wouldn't have to shuffle the SP or FP around so much!

>(John Gilmore)
>Lemme see, I seem to remember something about bit fields can't lay across
>more than four bytes...e.g. you can only put a 32-bit bitfield on a
>byte boundary.

Well since you're from Sun, John, you're probably used to the 68000.  Now
how many bits can it's bit fields span?  No kidding!  It doesn't even have
bit fields, you say?  (Back to the old shift-and-count loops, I guess.)  While
we're on bits and orthogonality, how many bits can a generic, single bit
operation span on the 68000?  Eight, you say?  On the 32000 it is unlimited:
i.e. setting bit 33 at a given pointer sets bit one, four bytes away from the
pointer.  This makes bit-mapped code a breeze to write.  By the way, a 32 bit
"bitfield" (in the sense of an atomic quantity) on the 68000 must be on an WORD
boundary.

No processor is without it's warts, but your jibe is grasping at straws.  I
suspect the 32 bit restriction makes the MMU simpler.  Since 31 bits can
enjoy arbitrary alignment, and 32 bits are usually an integer, this doesn't
bother me too much.  And the 32000 is still the most enjoyable processor I've
ever written assembly code for.

-- 
:::::: Jan Steinman		Box 1000, MS 61-161	(w)503/685-2843 ::::::
:::::: tektronix!tekecs!jans	Wilsonville, OR 97070	(h)503/657-7703 ::::::