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From: jans@mako.UUCP (Jan Steinman)
Newsgroups: net.micro.68k,net.micro.16k
Subject: Re: PDP11s vs the micros
Message-ID: <877@mako.UUCP>
Date: Tue, 30-Jul-85 17:22:31 EDT
Article-I.D.: mako.877
Posted: Tue Jul 30 17:22:31 1985
Date-Received: Thu, 1-Aug-85 22:29:54 EDT
References: <1617@hao.UUCP> <847@mako.UUCP> <2422@sun.uucp> <2994@nsc.UUCP> <2506@sun.uucp>
Reply-To: jans@mako.UUCP (Jan Steinman)
Organization: Tektronix, Wilsonville OR
Lines: 48
Xref: watmath net.micro.68k:1030 net.micro.16k:358
Summary: 

In article <2506@sun.uucp> guy@sun.uucp (Guy Harris) writes:
>> The 320xx is not a register machine like the PDP11 or some other well
>> known processors.  It's a p-machine with some registers added...
>
>Yes, you can use it as a stack machine (make both operands use the TOS 
>addresing mode)...  How many 32xxx instructions use TOS for both operands,
>and how many use a register, or register relative/memory space, or...?

Any instruction that uses "general" addressing could care less if the operands
are "TOS..., register, or register relative/memory space, or..."  Do you
have the "Instruction Set Reference Manual"?  Have you looked at the
instructions?

>If the majority do NOT use TOS, I submit that the 32xxx is not a "p-machine"
>in the sense of an engine intended to run P-code, but instead a VAXish
>register machine with some addressing modes added to make stack-oriented
>expression evaluation slightly simpler...

It is easier to count the instructions that do not use TOS for one operand.
A quick perusal shows "quick" (embedded constant operand), branches (would
anyone want a PC displacement on the stack, anyway?), block moves and
compares, prcessor directives (ENTER, EXIT, RET, SETCFG, etc.), and processor
register (LPRi, SPRi) instructions.  All the "mainstream" operations can have
any general addressing mode for either operand.

What's more, Nati has paid a great deal of attention to TOS access classes and
addressing speed.  TOS is the fastest memory addressing (if the bus could only
keep up!) and the SP behaves in a reasonable way, depending on the access
class:

	addd	tos,tos		first operand is popped (SP incremented),
		rd  rmw		second is only modified (SP unchanged)

	jump	tos		tos -> PC (SP unchanged)
		addr

	negd	tos,tos		first operand is popped (SP incremented),
		rd  wr		second operand is pushed (SP decremented)

	acbd	-1,tos,label	operand is decremented, loop until operand
		q  rmw disp	reaches zero. (SP unchanged)

As to Nati TOS usefulness to the mythical "p-machine", I'm working on a Z80
emulator that uses the 32032 SP as the Z80 PC.  Another thing we're exploring
is using the SP as a Smalltalk virtual stack pointer.
-- 
:::::: Jan Steinman		Box 1000, MS 61-161	(w)503/685-2843 ::::::
:::::: tektronix!tekecs!jans	Wilsonville, OR 97070	(h)503/657-7703 ::::::