Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/13/84; site intelca.UUCP Path: utzoo!watmath!clyde!burl!ulysses!allegra!oliveb!hplabs!intelca!kds From: kds@intelca.UUCP (Ken Shoemaker) Newsgroups: net.arch Subject: Re: Re: Cache revisited Message-ID: <48@intelca.UUCP> Date: Thu, 29-Aug-85 05:43:30 EDT Article-I.D.: intelca.48 Posted: Thu Aug 29 05:43:30 1985 Date-Received: Sat, 31-Aug-85 07:05:32 EDT References: <5374@fortune.UUCP> <901@loral.UUCP> <2583@sun.uucp> <5459@fortune.UUCP> <484@oakhill.UUCP> Distribution: net Organization: Intel, Santa Clara, Ca. Lines: 14 > BTW, the 10 to 15 percent cache hit rate is nothing to sneeze at when you look > at real performance gain. Take a hit rate of 10 percent. That 10 percent This assumes, of course, that there is no miss penalty... -- ...and I'm sure it wouldn't interest anybody outside of a small circle of friends... Ken Shoemaker, Microprocessor Design for a large, Silicon Valley firm {pur-ee,hplabs,amd,scgvaxd,dual,qantel}!intelca!kds ---the above views are personal. They may not represent those of the employer of its submitter.