Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 (Tek) 9/28/84 based on 9/17/84; site orca.UUCP Path: utzoo!watmath!clyde!burl!ulysses!mhuxr!mhuxn!ihnp4!qantel!hplabs!tektronix!orca!jans From: jans@orca.UUCP (Jan Steinman) Newsgroups: net.arch Subject: Re: What I miss in micro-processors (fairly long) Message-ID: <1713@orca.UUCP> Date: Fri, 6-Sep-85 12:44:28 EDT Article-I.D.: orca.1713 Posted: Fri Sep 6 12:44:28 1985 Date-Received: Mon, 9-Sep-85 00:38:59 EDT References: <796@kuling.UUCP> Reply-To: jans@orca.UUCP (Jan Steinman) Organization: Tektronix, Wilsonville OR Lines: 52 Summary: In article <796@kuling.UUCP> grzm@kuling.UUCP (Gunnar Blomberg/ADB) writes: >... there are a couple of features I've been missing rather badly... > >1. Stack overflow detection. > >I am aware that many systems let their mmu handle the problem, but that >doesn't seem like a very good solution to me (it doesn't check for stack >overflow, only memory references "just above" the stack limit, right?) The MMU is the answer. If you want arbitrary bounds checking, that means two registers and two internal compares on each stack access. If you can live with "page boundary" type checking, an internal mask and compare would eliminate the need for the the registers, but would still consume time during each stack access, unless it could be worked into the pipeline. (at considerable design effort!) The point is that this sort of thing is not free, or else everyone would do it. In my mind, it falls under the the "90/10" rule: it would increase stack complexity by at least 90% while being used less than 10% of the time. An internal (breif concession to Intel) MMU is the ideal place for such a check. An external MMU is the only other place it belongs. > >2. A quick subroutine call. > > What I would reaaly like to see here is something like the PDP-10 JSP >instruction, something that jumps to a subroutine and puts the return >address in a register instead of on the stack. I hope you never try anything recursive this way! Current popular recursive- capable languages don't have any way to guarantee a given routine will never be used recursively, so compilers for such languages (Pascal, C, Ada, etc.) would never use such an instruction. As for non-recursive assembly code, I would look carefully at re-designing your entire calling scheme. If time- optimal, macrofy and in-line the calls (with the added advantage of being able to use arbitrary registers). If stack space-optimal, write a macro that sticks the PC in a register, then jumps. Guess what I'm really trying to say is that I don't see enough use for either of these things to justify the effort needed to put them in. My favorite peeve is a rather restricted one, as yours are. I write interpreters and would love a multi-way, in-line, absolute indexed branch. Both VAX and National came so close, but their CASE instructions are PC relative, and must be a constant distance from the routines (VAX) or jump table (National). This means in-line coding of the routine dispatcher is not possible with this instruction. It would be so nice to end each routine with a CASE (R7),TABLE and have control passed to the routine who's address is at TABLE+R7*size. -- :::::: Jan Steinman Box 1000, MS 61-161 (w)503/685-2843 :::::: :::::: tektronix!tekecs!jans Wilsonville, OR 97070 (h)503/657-7703 ::::::