Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site bbncc5.UUCP Path: utzoo!watmath!clyde!burl!ulysses!gamma!epsilon!zeta!sabre!petrus!bellcore!decvax!genrad!panda!talcott!harvard!bbnccv!bbncc5!sdyer From: sdyer@bbncc5.UUCP (Steve Dyer) Newsgroups: net.micro,net.micro.pc,net.arch Subject: Re: Memory timing and other picture postcards Message-ID: <171@bbncc5.UUCP> Date: Mon, 9-Sep-85 12:18:14 EDT Article-I.D.: bbncc5.171 Posted: Mon Sep 9 12:18:14 1985 Date-Received: Wed, 11-Sep-85 08:17:45 EDT References: <503@talcott.UUCP> Organization: Bolt Beranek and Newman, Cambridge, MA Lines: 14 Xref: watmath net.micro:11923 net.micro.pc:5267 net.arch:1770 > 3) What other chips in the AT are speed sensitive in the > 6-10 MHz range? > I know this isn't exactly the answer you're looking for, since it's determined solely on empirical experience, but I have been using an 18.4 mhz xtal in my AT for 3 months now, and the only problem I have is an occasional 1.2mb floppy disk error (abort, retry, ignore) from DOS. It "feels" suspiciously like the ROM BIOS uses a timing loop when poking the controller's registers, though I haven't looked at the code yet. -- /Steve Dyer {harvard,seismo}!bbnccv!bbncc5!sdyer sdyer@bbncc5.ARPA