Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84 (Fortune 01.1b1); site graffiti.UUCP Path: utzoo!watmath!clyde!burl!ulysses!allegra!mit-eddie!think!harvard!seismo!ut-sally!ut-ngp!shell!graffiti!peter From: peter@graffiti.UUCP (Peter da Silva) Newsgroups: net.lang.c Subject: Re: Numeric comparisons Message-ID: <160@graffiti.UUCP> Date: Tue, 3-Sep-85 07:40:25 EDT Article-I.D.: graffiti.160 Posted: Tue Sep 3 07:40:25 1985 Date-Received: Tue, 10-Sep-85 03:36:45 EDT References: <10176@ucbvax.ARPA> <5118@mit-eddie.UUCP> <693@terak.UUCP> Organization: The Power Elite, Houston, TX Lines: 16 > Compiler users note -- if your compiler gives the wrong results, the > compiler writer might not be completely at fault. Many early CPU > chips (8080A, Z80, 6502, etc.) did comparison by subtraction, and a > compiler would have had to generate extra code to test for Overflow > in order to get the correct result. Most chips that I know of handle compare by doing a subtraction, setting the bits, and throwing away the results. Since most chips also allow a single instruction to test any number of flags no extra code need be generated to differentiate between the two. Maybe you're thinking of FORTH which generally does what you just described... Anyway, in Z80, 6502, 8080, 6809, PDP-11, and so on the scenario I just described takes place. the BLT instruction tests for N bit xor V bit (I think I've got that right). Or does it test for a nice light sandwich made with bacon, lettuce, and tomato? I don't remember. It's too early.