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From: garys@bunker.UUCP (Gary M. Samuelson)
Newsgroups: net.lang.c
Subject: Re: Re: Numeric comparisons
Message-ID: <986@bunker.UUCP>
Date: Tue, 10-Sep-85 10:58:19 EDT
Article-I.D.: bunker.986
Posted: Tue Sep 10 10:58:19 1985
Date-Received: Wed, 11-Sep-85 20:09:51 EDT
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Organization: Bunker Ramo, Trumbull Ct
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> Most chips that I know of handle compare by doing a subtraction, setting the
> bits, and throwing away the results. Since most chips also allow a single
> instruction to test any number of flags no extra code need be generated to
> differentiate between the two.

What chips *are* you talking about?

> Anyway, in Z80, 6502, 8080, 6809, PDP-11, and so on the scenario I just
> described takes place. the BLT <xxx> instruction tests for N bit xor V bit

The Z80 and 8080 have no such instruction -- there are four testable flags
(carry, zero, parity/overflow, and sign); each conditional branch tests
the state of exactly one of these flags.

Gary Samuelson
ittatc!bunker!garys