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From: freund@nsc.UUCP (Bob Freund)
Newsgroups: net.micro.68k
Subject: Re: Re: PDP11s vs the micros
Message-ID: <3233@nsc.UUCP>
Date: Mon, 9-Sep-85 09:58:47 EDT
Article-I.D.: nsc.3233
Posted: Mon Sep  9 09:58:47 1985
Date-Received: Wed, 11-Sep-85 05:41:25 EDT
References: <1617@hao.UUCP> <847@mako.UUCP> <2422@sun.uucp> <2607@sun.uucp> <5874@utzoo.UUCP> <492@oakhill.UUCP> <290@frog.UUCP>
Reply-To: freund@nsc.UUCP (Bob Freund)
Organization: National Semiconductor, Sunnyvale
Lines: 21
Summary: 


Now that the subject of internal state-dumping has been discussed for
awhile, I have a question that has as yet not been addressed.
In a multiprocessor system designed for transparent operation and
which has the ability to allocate processors to tasks dynamicly, it
is possible that a task be re-started on a different processor than
the one that faulted.  If there is any difference in the micro-state
between cpu revision levels, it could happen that the restart would
fail due to incompatible micro-state.  Does Motorola guarantee
micro-state compatibility across revision levels?  Does it guarantee
compatibility of micro-state across implementations?
If the answer to the first question is false, then all multiprocessors
must be at the same cpu revision level.  If the answer to the second
question is false, then it will not be possible to design multiprocessors
unless they were constituted of homogeneous types.  What effect
does this have on the types of multiprocessor systems that can be designed
based on the part?  What is the effect on distributed systems that
allow task migration across network.  What about paging across network?

Have fun
-bob