Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/3/84; site enmasse.UUCP Path: utzoo!watmath!clyde!bonnie!akgua!whuxlm!harpo!decvax!genrad!panda!enmasse!dave From: dave@enmasse.UUCP (Dave Brownell) Newsgroups: net.micro.68k Subject: Re: Re: PDP11s vs the micros Message-ID: <464@enmasse.UUCP> Date: Wed, 31-Dec-69 18:59:59 EDT Article-I.D.: enmasse.464 Posted: Wed Dec 31 18:59:59 1969 Date-Received: Fri, 13-Sep-85 04:48:35 EDT References: <1617@hao.UUCP> <847@mako.UUCP> <2422@sun.uucp> <2607@sun.uucp> <5874@utzoo.UUCP> <492@oakhill.UUCP> <290@frog.UUCP> <3233@nsc.UUCP> Reply-To: dave@enmasse.UUCP (Dave Brownell) Organization: Enmasse Computer Corp., Acton, Mass. Lines: 12 In article <3233@nsc.UUCP> freund@nsc.UUCP (Bob Freund) writes: > ... it > is possible that a task be re-started on a different processor than > the one that faulted. If there is any difference in the micro-state > between cpu revision levels, it could happen that the restart would > fail due to incompatible micro-state. Does Motorola guarantee > micro-state compatibility across revision levels? ... At least one company that I know of had this problem. Using MC68010s, the problem was that some internal state bits might not be set identically; Motorola gave a few instructions to execute that would guarantee that all the state bits were identical on all processors.