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From: gnu@l5.uucp (John Gilmore)
Newsgroups: net.micro,net.micro.amiga
Subject: Re: Amiga
Message-ID: <80@l5.uucp>
Date: Sun, 8-Sep-85 19:35:09 EDT
Article-I.D.: l5.80
Posted: Sun Sep  8 19:35:09 1985
Date-Received: Tue, 10-Sep-85 03:30:01 EDT
References: <1146@brl-tgr.ARPA>
Organization: Ell-Five [Consultants], San Francisco
Lines: 21
Xref: watmath net.micro:11904 net.micro.amiga:92
Followups-To: net.micro.amiga

(Further discussion redirected to net.micro.amiga.)

In article <1146@brl-tgr.ARPA>, ROKICKI@SU-SCORE.ARPA (Tomas Rokicki) asks:
> 	1.  Can it use a 68010 with minor changes to a few stack offsets in
> the operating system?
Probably, unless they were sloppy with the timing on the BERR input to the
68000.  Why would you want to?  It's a little faster, but not much, unless
you are doing a lot of 1-instruction loops -- and they have custom chips
for that kind of stuff.
 
> 	3.  Is the 1.5 Megabyte `hole' for future 1-Megabit chips on board?
> How soon can we expect to see the required 256K X 4 bit chips?  And can the
> on-board coprocessors access this extra memory?
Last time I heard, their custom chips don't have enough address bits to
access more memory than it comes with.  A big design botch, as far as I'm
concerned.  Megabit chips are definitely on the way, but they probably
won't be real useful in today's Amiga.
 
> 	4.  I'm also interested in the timing for off-board memory accesses;
> I assume this memory only has to run half as fast as the on-board memory.
Why would you assume something like that?