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Path: utzoo!watmath!clyde!burl!ulysses!allegra!mit-eddie!think!harvard!cmcl2!rna!dan
From: dan@rna.UUCP (Dan Ts'o)
Newsgroups: net.micro.68k,net.arch
Subject: Multiple 68020's on VME ?
Message-ID: <442@rna.UUCP>
Date: Fri, 27-Sep-85 05:55:27 EDT
Article-I.D.: rna.442
Posted: Fri Sep 27 05:55:27 1985
Date-Received: Mon, 30-Sep-85 00:47:34 EDT
Organization: Rockefeller Neurobiology
Lines: 26
Xref: watmath net.micro.68k:1161 net.arch:1833


	We would like to hear from people who know about or who have
used multiple 680XX's on a bus. We are tentatively considering a ~10
processor machine using 68020's on VME for a particular real-time
data collection, analysis and display application.

	I know that some people at Calgary have a similar project,
using the Harmony OS. Anybody know more about that project ?

	Is such a machine really easy to build with off-the-shelf
boards ? I would assume that each processor's instruction space should
reside in local memory and preferably most of its data requirements as
well. What is the practical VME memory bandwidth of a typical VME system
using standard memory boards and backplanes ?

	Thanks.

					Cheers,
					Dan Ts'o
					Dept. Neurobiology
					Rockefeller Univ.
					1230 York Ave.
					NY, NY 10021
					212-570-7671
					...cmcl2!rna!dan
					rna!dan@cmcl2.arpa


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