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Path: utzoo!utcsri!ubc-vision!alberta!calgary!cleary
From: cleary@calgary.UUCP (John Cleary)
Newsgroups: net.micro.68k,net.arch
Subject: Re: Multiple 68020's on VME ?
Message-ID: <405@calgary.UUCP>
Date: Mon, 30-Sep-85 13:14:06 EDT
Article-I.D.: calgary.405
Posted: Mon Sep 30 13:14:06 1985
Date-Received: Tue, 1-Oct-85 20:16:03 EDT
References: <442@rna.UUCP>
Organization: University of Calgary, Calgary, Alberta
Lines: 58

> 
> 	We would like to hear from people who know about or who have
> used multiple 680XX's on a bus. ..

> 	I know that some people at Calgary have a similar project,
> using the Harmony OS. Anybody know more about that project ?
> 

I am at Calgary and yes we have a multiprocessor 68000 system going -
called Calgary Mesh Machine - CM^2.
It is a mesh connected torus with each machine connected to 4 nearest 
neighbours. Each machine has an independent clock.  Communication between
neighbours is via a 4K block of dual ported memory.  This last allows
very high speed transfer without interrupting the destination processor
until the entire message is there.  Currently we use the shared memory as
a fast message passing device but are thinking hard about how to use it
for a more flexible concurrent prolog implementation.
We use a home grown kernel with Thoth like message passing between processes
-- this is the JADE system inhereted from a distributed systems and monitoring
project here at Calgary.
(It knows about Unix and can use Unix I/O via a host).
Current main applications (still being worked on) are ray tracing
and timewarp based simulation.

> 	Is such a machine really easy to build with off-the-shelf
> boards ? I would assume that each processor's instruction space should
> reside in local memory and preferably most of its data requirements as
> well. What is the practical VME memory bandwidth of a typical VME system
> using standard memory boards and backplanes ?

It was easy to build.  Current component costs approx $800/board.
We have a 3x3 prototype array almost going and have had a 2x2 array going for
some time.  We designed the boards and did our own artwork ourselves.
Off the shelf boards are expensive and tend to have a lot othings that
are irrelevant in a very simple environment such as this.
The current hardware configuration per board is:
	68010 - 8MHz clock
	512KB local RAM
	2x4K dual ported RAM 
		plus two off board connectors to RAM on other boards
	2xRS232C connectors
	timer and interrupts from each of four neighbours.

	One of the boards has a 1Mb/sec net connection (omninnet).
If I ever get money to build the mark II it will have more memory,
floating point support, and an ethernet connection.

	John G. Cleary,
	Dept. Computer Science,
	The University of Calgary,
	2500 University Dr.,
	N.W. Calgary,
	Alberta,
	CANADA T2N 1N4.

	Ph. (403)284-6015
	Usenet: ...{ubc-vision,ihnp4}!alberta!calgary!cleary
	CRNET (Canadian Research Net): cleary@calgary


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