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From: husmann@uicsrd.CSRD.UIUC.EDU
Newsgroups: net.arch
Subject: Re: Cray-2 impressions
Message-ID: <1000003@uicsrd>
Date: Thu, 17-Oct-85 10:39:00 EDT
Article-I.D.: uicsrd.1000003
Posted: Thu Oct 17 10:39:00 1985
Date-Received: Mon, 21-Oct-85 03:58:23 EDT
References: <1189@ames.UUCP>
Lines: 60
Nf-ID: #R:ames.UUCP:-118900:uicsrd:1000003:000:2173
Nf-From: uicsrd.CSRD.UIUC.EDU!husmann    Oct 17 09:39:00 1985


> In article <1189@ames.UUCP>, eugene@ames.UUCP (Eugene Miya) writes:
> > I had call to go visit the Cray-2 downstairs.  It's tiny. ...
> 
> Gene:
>   Is it true that the CRAY-2 cpu is really a CRAY-1  (not an X-MP)
> cpu, meaning that it has only one path to memory and doesnt do
> chaining?  So the only major speedup between the X-mp and -2
> cpu's is the faster clock cycle of the 2,  4.1 ns.
> Also, I understand that the 256K 64-bit memory is slower than the
> memory on the x-mp, but there is a fast 16K memory cache per processor.
> So it really looks like a CDC 7600!!
> Question is, will the Y-MP be faster?  (16 processors, 64Mwords)
> 
> Have you looked at the Cray-2 compiler... I hear its based on the old
> CFT1.10 and doesnt have character data (yet).
> I'd like to see some comparison timings between the x-mp and the 2.
> 
> 
> 
> -- 
>      
>     [rchrd] = Richard Friedman
>               Pacific-Sierra Research, 2855 Telegraph #415
>               Berkeley, CA 94705 (415) 540 5216
>     UUCP: {hplabs,ptsfa,dual}!well!rchrd

The Cray-2 brochure I have lists the following facts about the Cray-2:

 o a 256 *million* word Common memory (not 256K),
 o *4* Background CPU's,
 o 1 Foreground CPU; it appears the background CPU's handle the computation and
   the Foreground CPU "supervises overall system activity among the Foreground
   Processor, Background Processors, Common Memory, and peripheral
   controllers,"
 o it looks like each Background CPU has only *one* memory port.

New things I noticed in the brochure:

 o UNIX (of course),
 o gather and scatter instructions,
 o semaphores for synchronization.

I couldn't find any information about chaining which suggests it's gone.

The brochure states the Cray-2 throughput is 6-12 times that of the Cray-1.
I have a note scribble on the side that say "X-MP about 3 times."  I can't
remember if that means the Cray-2 is about three times the X-MP, or if the
X-MP is about three times the Cray-1. (?!)



Harlan Husmann

Center for SuperComputer Research and Development
University of Illinois at Urbana-Champaign

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