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From: rb@ccivax.UUCP (rex ballard)
Newsgroups: net.micro.6809,net.micro.68k
Subject: Re: 68xxx v.s. 80xxx    :-)
Message-ID: <304@ccivax.UUCP>
Date: Wed, 9-Oct-85 21:35:12 EDT
Article-I.D.: ccivax.304
Posted: Wed Oct  9 21:35:12 1985
Date-Received: Sun, 13-Oct-85 04:44:50 EDT
References: <370@wlbr.UUCP> <6022@utzoo.UUCP>
Organization: CCI Telephony Systems Group,  Rochester NY
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Xref: watmath net.micro.6809:558 net.micro.68k:1230

> > Intel puts a divide-by-N counter for the main clock on their micro chips.
> > Not for marketing reasons, you understand. But in hindsight, it's clever.
> > Motorola doesn't....
> > HEY MOTOROLA! The path to riches is obvious! Put a divider in the "68020A"
> > so that the outside clock frequency will be 500MHz! Or make it a hybrid
> > with a 100GHz clock!
> 
> Actually, in a BYTE article on the 6809 some years ago, its designers said
> something like:
> 
> 	We thought about putting a few divider stages on the clock inputs
> 	so we could win the highest-clock-speed race, but we decided that
> 	system designers wouldn't appreciate having to put a tuned cavity
> 	on their boards for the clock oscillator...
> -- 
> 				Henry Spencer @ U of Toronto Zoology
> 				{allegra,ihnp4,linus,decvax}!utzoo!henry


Take a look at the "bus Cycle" for a 68000/10/20, there are 4-6 "clocks"
per cycle.  Much of that is spent Asynchronously doing address calculations
for the extensive instruction set.  Fortunately, the wider registers, ALU,
and internal busing still leave the 8086 in the dust!