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From: glen@intelca.UUCP (Glen Shires)
Newsgroups: net.micro.pc
Subject: Re: Re: Clock Interrupt Screw-Up?
Message-ID: <114@intelca.UUCP>
Date: Mon, 7-Oct-85 15:43:37 EDT
Article-I.D.: intelca.114
Posted: Mon Oct  7 15:43:37 1985
Date-Received: Sat, 12-Oct-85 19:06:21 EDT
References: <822@gitpyr.UUCP> <201@mips.UUCP>
Organization: Intel, Santa Clara, Ca.
Lines: 44

> [...]
> 
> > I have a section of assembler code which exhibits an interesting anomaly:
> > 
> >   The code works just fine when interrupts are disabled.  However, when
> > interrupts are enabled the code produces the wrong results.  There is
> > ...
> > number into a binary value, and back to ASCII, and then prints the result.
> > The result is always correct when interrupts are disabled, but about
> > 1 in 20 times it is wrong when interrupts are enabled.  The wrong value
> > appears to be a random value, and appears on a random basis.  The only
> > interrupt which should be occuring is the clock (timer) interrupt.
> 
> 
> Without seeing the code, this is purely a guess ...
> 
> Sounds alot like you've been bitten by the "multiple prefixes on a string-op"
> feature of the 8086/8.  Let's say, for example, you code:
> 
> 		rep movs   ES:byte ptr[DI],CS:[SI]
> 
> to move a string.  "rep" is a prefix to the "movs" instruction, but so is
> the "CS:" seg-reg override byte.  As long as there's no interruption, this
> works just fine.  If a rupt occurs in the middle of the move though, watch
> out!
> [...]
all true.
most instructions don't require more than one interrupt.
REP CS: MOVS is an exception.  One fix is the sti/cli, another is avoid
the CS: override (use DS):
> 
> BTW, anyone know if this stunning example of architectural innovation is still
> with us in the 286?
> 
> /kim
> 
The 186/188, and 286 allow multiple prefixes!


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