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From: kds@intelca.UUCP (Ken Shoemaker)
Newsgroups: net.arch
Subject: Re: Re: 386 info
Message-ID: <145@intelca.UUCP>
Date: Fri, 22-Nov-85 01:13:23 EST
Article-I.D.: intelca.145
Posted: Fri Nov 22 01:13:23 1985
Date-Received: Mon, 25-Nov-85 07:57:13 EST
References: <965@mcnc.mcnc.UUCP> <2359@ukma.UUCP> <414@graffiti.UUCP> <3530@utah-cs.UUCP>
Distribution: net
Organization: Intel, Santa Clara, Ca.
Lines: 28

> In article <414@graffiti.UUCP> peter@graffiti.UUCP (Peter da Silva) writes:
> >> also possible to use just about any register as an index register.  (I
> >> think SP is the only register that can't be used this way - it remains
> >> almost exclusively as a stack pointer.)  So it should be a lot easier
> >
> >Yes, but indexing off the stack pointer is something compilers like to do:
> 
> Well, there are two problems here.  First, Intel defines two sorts of 
> addressing modes, based and indexed.  ANY register (including sp) can be
> used as a based register, but SP cannot be used as a indexed register.

also, on the 386 you can use both bases and indexes at the same time.  If
you didn't want to use the EBP register as a frame pointer, but instead wanted
to use the stack pointer (ESP), you could use the ESP register as the base
of the area, and then as need be use any other register as a (scaled) index,
and then add an immediately specified offset.  Of course, the more typical
thing to do is still to use the EBP register as the frame pointer, and just
use the ESP register as the stack pointer.  An example instruction using
these addressing modes might look like:

	add	al,byte ptr [esp + ecx*4 + 24h]
-- 
yes, some uncomplicated peoples still believe this myth...

Ken Shoemaker, Santa Clara, Ca.
{pur-ee,hplabs,amd,scgvaxd,dual,qantel}!intelca!kds
	
---the above views are personal.