Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/5/84; site umd5.UUCP Path: utzoo!watmath!clyde!burl!ulysses!mhuxr!mhuxn!ihnp4!qantel!lll-crg!seismo!umcp-cs!cvl!umd5!zben From: zben@umd5.UUCP Newsgroups: net.arch Subject: Re: Are "discrete" CPUs faster than VLSI? And why? Message-ID: <800@umd5.UUCP> Date: Wed, 27-Nov-85 06:53:58 EST Article-I.D.: umd5.800 Posted: Wed Nov 27 06:53:58 1985 Date-Received: Fri, 29-Nov-85 21:29:36 EST References: <1795@peora.UUCP> <277@l5.uucp> <555@brl-sem.ARPA> Reply-To: zben@umd5.UUCP (Ben Cranston) Organization: U of Md, CSC, College Park, Md Lines: 36 Summary: MOS was needed to get enuf gates on a chip. In article <555@brl-sem.ARPA> ron@brl-sem.ARPA (Ron Natalie ) writes: >In article <1795@peora.UUCP>, jer@peora.UUCP (J. Eric Roskos) writes: >> More generally, ...CPUs built with discrete >> components (as vs. all on a single IC) tend to be faster. This was >> something I was skeptical of myself back during my days of faith in >> the microprocessor, and I still tend to believe that is true largely due >> to practical considerations than theoretical ones. >I have a big black thing in my computer room which is a supercomputer >built out of ECL MSI chips. It's about the best that could ever be done >with discrete components. The distance between the chips is just too far >for the speed of the electron (when you are dealing with nanoseconds, >the farthest you can go is a little under a foot). Originally MOS (mostly NMOS but sometimes PMOS) was used to implement micro- processors because gates could be made smaller, and there was a problem cramming enough gates onto a reasonable sized chip to implement a full non- trivial microprocessor. Also, the power dissipation was lower, making the heat-dissipation criteria a bit less critical. But, the price that was paid for this was speed - MOS couldn't go quite as fast as STTL. Remember that MOS uses "Field effect" transistors, not "Junction" transistors. One major differance is that "Junction" transistors are CURRENT MODE (low impedance) devices, while "Field effect" transistors are VOLTAGE MODE (high impedance) devices. This implies that each Pf (pico-farad) of parasitic capacitance takes longer to charge and discharge with MOS because less current is available to charge or discharge it. The big promise of SOS technology (silicon on sapphire) was that these capacitances would be greatly reduced because the substrate was farther away from the conduction lines. With today's modern production techniques I don't know how much this remains the limiting factor. But, I haven't seen any TTL microprocessors lately, have you? Do you remember the MPY16 parallel 16 by 16 multiplier chip? This animal is TTL and quite fast, but it also has a mushroom-cloud-shaped heat sink growing from it's top, and from all reports it seems to need it! -- Ben Cranston ...{seismo!umcp-cs,ihnp4!rlgvax}!cvl!umd5!zben zben@umd2.umd.edu