Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site sauron.UUCP Path: utzoo!linus!decvax!decwrl!pyramid!gould9!ncr-sd!ncrcae!sauron!campbell From: campbell@sauron.UUCP (Mark Campbell) Newsgroups: net.arch Subject: Fast RAM with a "clear" pin (not TMS) Message-ID: <598@sauron.UUCP> Date: Mon, 9-Dec-85 16:12:59 EST Article-I.D.: sauron.598 Posted: Mon Dec 9 16:12:59 1985 Date-Received: Wed, 11-Dec-85 21:39:42 EST Distribution: net Organization: NCR Corp., Advanced System Development, Columbia, SC Lines: 16 Has anyone out there heard of fast (less than 40ns) RAM with a "clear" pin (excluding the TI TMS chip)? What I am trying to do is to locate an alternative to the TMS chip for implementing a cache. Given the length of time the TMS chip has been on the market, its high cost, the fact that it is single-sourced, and the fact that it has never been improved, it seems that SOMEONE out there would have implemented an alternative. If you have any information, please let me know, either through mail or by posting. Thanks ahead of time. -- Mark Campbell Phone: (803)-791-6697 E-Mail: {decvax!mcnc, ihnp4!msdc}!ncsu!ncrcae!sauron!campbell