Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Posting-Version: version B 2.10.3 4.3bsd-beta 6/6/85; site fortune.UUCP
Path: utzoo!watmath!clyde!burl!ulysses!mhuxr!mhuxt!houxm!ihnp4!fortune!wall
From: wall@fortune.UUCP (Jim Wall)
Newsgroups: net.arch
Subject: Re: Fast RAM with a "clear" pin (not TMS)
Message-ID: <5809@fortune.UUCP>
Date: Fri, 13-Dec-85 11:47:38 EST
Article-I.D.: fortune.5809
Posted: Fri Dec 13 11:47:38 1985
Date-Received: Sat, 14-Dec-85 08:12:16 EST
References: <598@sauron.UUCP>
Distribution: net
Organization: Fortune Systems, Redwood City, CA.
Lines: 19
Keywords: I've got it!!


   I knew their was one somewhere. AMD makes the Am9150,
a 1K x 4  high speed static with a memory reset feature.
In only two cycle times the entire memory contents will 
be zeroed out. 

   Other details: 24 pin skinny dip, 25 nsec access, 5 volt
operation, 900 mwatt power consumption.

   We did a MMU design with this to compare it with other
options; and the other options won. But not for technical
reasons. They make a great basis for a paged MMU, without
using the TI 2150's. Although the 2150's reduce the logic so
much, it makes the single sourcing palatable.

					-Jim Wall
					Fortune Systems Corp.

				...amd!fortune!wall