Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Posting-Version: version B 2.10.2 9/18/84; site amdahl.UUCP
Path: utzoo!watmath!clyde!burl!ulysses!gamma!epsilon!zeta!sabre!petrus!bellcore!decvax!decwrl!sun!amdahl!mat
From: mat@amdahl.UUCP (Mike Taylor)
Newsgroups: net.arch
Subject: Re: caches in vector machines and Dhrystone (bogus)
Message-ID: <2428@amdahl.UUCP>
Date: Thu, 26-Dec-85 12:52:43 EST
Article-I.D.: amdahl.2428
Posted: Thu Dec 26 12:52:43 1985
Date-Received: Sat, 28-Dec-85 01:29:19 EST
References: <125@decwrl.DEC.COM> <1290@ames.UUCP>
Organization: Amdahl Corp, Sunnyvale CA
Lines: 13

> 
> Yes, the Japanese machines have some interesting variable length
> vector schemes which could be called a cache.  The Cray-2 also has
> a "local" 16 K Word memory to replace the B and T registers, but
> CRI does not use the work "cache."  I think it can be consider such.
> I am supposed to run on a VP-200 later this week.

For what it's worth, Fujitsu VPs do I-fetch from cache.  Operand fetch
proceeds directly from mainstore via load/store pipe(s).
-- 
Mike Taylor                        ...!{ihnp4,hplabs,amd,sun}!amdahl!mat

[ This may not reflect my opinion, let alone anyone else's.  ]