Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/5/84; site scirtp.UUCP Path: utzoo!watmath!clyde!cbosgd!ihnp4!mhuxn!mhuxr!mhuxt!houxm!whuxl!whuxlm!akgua!mcnc!rti-sel!scirtp!dfh From: dfh@scirtp.UUCP (David F. Hinnant) Newsgroups: net.arch Subject: how to outrun the prefetch queue? Message-ID: <559@scirtp.UUCP> Date: Mon, 30-Dec-85 14:38:31 EST Article-I.D.: scirtp.559 Posted: Mon Dec 30 14:38:31 1985 Date-Received: Wed, 1-Jan-86 00:54:14 EST Distribution: net Organization: SCI Systems, Research Triangle Park, NC Lines: 28 For a particular benchmark test I'm writing, I need to outrun the prefetch queue of various microprocessors. With Intel architecture, you can repeat something like: mov ax, ax mov ax, ax mov ax, ax ... and soon outrun the prefetch queue easily on the 8086, 80186, and 80286 since it takes longer to load the instruction sequence than to execute it (four ticks to load the instruction (best case) (three for the 80286) and two ticks to execute it). What instruction(s) can I use with the Motorola, National Semi, and Zilog families to outrun the prefetch queue? From the data manuals I have on the 68000, it looks like a: move d1, d2 move d1, d2 move d1, d2 ... will keep up with the prefetch queue, but not outrun it. Any comments appreciated. -- David Hinnant SCI Systems, Inc. ...{decvax, akgua}!mcnc!rti-sel!scirtp!dfh