Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/18/84; site brl-tgr.ARPA Path: utzoo!watmath!clyde!burl!ulysses!allegra!mit-eddie!think!harvard!seismo!brl-tgr!tgr!jon@cit-vax.arpa From: jon@cit-vax.arpa (Jonathan P. Leech) Newsgroups: net.lang.c Subject: Re: 16 v. 32 bit Message-ID: <1006@brl-tgr.ARPA> Date: Mon, 23-Dec-85 16:33:11 EST Article-I.D.: brl-tgr.1006 Posted: Mon Dec 23 16:33:11 1985 Date-Received: Wed, 25-Dec-85 04:03:35 EST Sender: news@brl-tgr.ARPA Lines: 22 > The Motorola 68000 family of microprocessors ALL implement full 32-bit > internal architecture. That means 32-bit registers, 32-bit data paths, and > a 32-bit ALU. I recommend that you obtain FACTS next time instead of posting > hearsay to the net. Try reading the Motorola MICROPROCESSOR COMPONENTS DATA > MANUAL (or Hitachi's -- they're a second source) and then say "32 bits" > until you're convinced. > > Dave Lewis Loral Instrumentation San Diego The 68000 has no 32 bit multiply or divide instructions. This does not seem like a `full 32-bit internal architecture' to me. This leads to an interesting question: should 68000 C compilers have sizeof(int) == 16 bits or 32 bits? The common choice is 32, I suspect so that poorly written VAX code would port without any work; but 16 bits seems more natural given the limitations of 32 bit arithmetic on the machine. Having a religious bias in favor of 68000s is fine - I have one, too - but don't let it blind you to FACTS. -- Jon Leech (jon@cit-vax.arpa) __@/