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From: hammond@petrus.UUCP (Rich A. Hammond)
Newsgroups: net.lang.c
Subject: Re: 16 v. 32 bit
Message-ID: <781@petrus.UUCP>
Date: Fri, 27-Dec-85 07:02:02 EST
Article-I.D.: petrus.781
Posted: Fri Dec 27 07:02:02 1985
Date-Received: Sat, 28-Dec-85 01:43:35 EST
References: <730@brl-tgr.ARPA> <988@loral.UUCP> <991@loral.UUCP> <398@well.UUCP>
Organization: Bell Communications Research, Inc
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>            Mike Farren writes: [ on 16 bit vs 32 bit]
>      The second standard is the internal organization of the processor.
> My own definition for this standard is the ability of the processor to
> execute ALL of its data move, logical, and arithmetic instructions on
> a given word size.

Of course, this puts RISC machines at an unfair advantage. For example
the RISC I and II don't have a multiply or divide instruction, nor a
complete single instruction 32 bit immediate mode (takes 2 instructions).
Are they not 32 bit machines?  If not, what are they? (13 bits, since
that is the size of their immediate field for arithmetic? :-) )
If they are 32 bit machines, then shouldn't the 68000 and 68010, which
can do all the add/shift/logical instructions the RISCs can for 32 bit
operations, also be considered 32 bit machines?  It's silly to classify
a machine with a subset of the operations of another machine as being
"wider" than the more complete instruction set machine.

This gets even more complicated if you throw in floating point. :-)

Rich Hammond	[ihnp4|allegra|decvax|ucbvax] !bellcore!hammond