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From: wendyt@isieng.UUCP (Wendy Thrash)
Newsgroups: net.micro
Subject: Re: 386 Family Products (really :-) on lots of registers)
Message-ID: <183@isieng.UUCP>
Date: Tue, 17-Dec-85 19:27:59 EST
Article-I.D.: isieng.183
Posted: Tue Dec 17 19:27:59 1985
Date-Received: Fri, 20-Dec-85 01:38:24 EST
References: <129@intelca> <4400130@uiucdcsb> <6185@utzoo.UUCP> <433@ecn-pc.UUCP> <132@ism780c.UUCP> <498@ukc.UUCP>
Reply-To: wendyt@isieng.UUCP (Wendy Thrash)
Organization: Integrated Solutions, San Jose, CA
Lines: 13

In <498@ukc.UUCP>, rde@ukc.UUCP (R.D.Eager) writes

> A cache is after  all  a  dynamic equivalent  to the attempts (often bad ones)
> at register optimisation by compilers.
> Let's stop moaning about the lack  of  general  purpose  registers...who
> needs them? Keep the compiler writer's job easy...

Come on, R.D., make my day -- give me lots of g.p. registers; I can handle it.
We compiler writers don't want easy jobs, we want job security.  :-)
The equivalence between a cache and lots of g.p. registers (well-used) seems
to me about the same as the equivalence between Diana Rigg and an inflatable
doll; it works well in theory, but loses something in the implementation. :-p
(No, I don't necessarily mean to imply that Diana Rigg is well-used.)