Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/17/84; site oasys.UUCP Path: utzoo!watmath!clyde!cbosgd!ihnp4!qantel!lll-crg!seismo!hao!nbires!oasys!jcg From: jcg@oasys.UUCP Newsgroups: net.arch Subject: DMA controller chips Message-ID: <171@oasys.UUCP> Date: Wed, 8-Jan-86 15:01:16 EST Article-I.D.: oasys.171 Posted: Wed Jan 8 15:01:16 1986 Date-Received: Mon, 13-Jan-86 04:46:38 EST Distribution: net Organization: NBI,Inc, Boulder CO Lines: 53 As part of a design for a 80186-based controller, we've been looking at DMA controller chips. We need four DMA channels (in addition to the two in the '186) that may all be in operation concurrently. The peripherals being interfaced are 8-bit bus oriented, but the '186 has 16-bit wide RAM so we want the DMA to do word assembly/disassembly for us. We have not been able to find ANY chip on the market which will do the job for us. In this article, I want to describe the shortcomings of each of the chips we have looked at, and generate some discussion of the architectural 'features' which make these chips useless to us. Hopefully someone out in net-land will be able to clue us into a more useful DMA chip. -Intel 8237: This is an old 8085 family part which does not fit well into a 16-bit processor design. It requires a fair amount of 'glue' logic around it and still performs very slowly -- its maximum clock rate is only 5 MHz so its bus cycles are very slow. It is certainly inexpensive, though. The Intel 8257 is a even older and slower version of the 8237. These parts have no provision for word-assembly. The 8237 is also known as AMD Am9517. -AMD Am9516 and Zilog Z8016: These are 2-channel DMA chips which are very similar to each other. They have word-assembly and dissassembly but have only one word former shared between both channels. The chip performs two single-byte bus cycles in succession for each DMA request from a peripheral and the other DMA channel cannot be serviced between them. These parts are also a little expensive for us ($20) since we would need two of them to meet our 4 channel requirement, but this doesn't matter because the channels are not truly independent. -68450 from Hitachi (?Motorola): We haven't looked at this device too hard because it was quoted to us at $68 which is far too expensive for us. It is not clear from the specs we have whether the word-assembly is shared between channels. -National NS32203: This chip is in the right price range ($28) but the data sheets say "If word assembly/disassembly will be performed ... , after the first byte is transferred to/from the device, the DMA does not acknowledge o other channel requests until the second byte is transferred." In other words, the channels are AGAIN sharing the word assembly logic. The conclusions we reach from all this is that the existing DMA chips cannot do what we want, and that we must build our own or change the requirements. This is amazing to us because we did not think our requirements were unusual. So how about it? Have we overlooked anything obvious? Please send any flames or personal replies to oasys!jcg@nbires.UUCP Jonathan Griffitts NBI, Inc. (This note states my own opinions and not necessarily those of anyone else)