Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.3 4.3bsd-beta 6/6/85; site ucbvax.BERKELEY.EDU Path: utzoo!watmath!clyde!burl!ulysses!ucbvax!arpa-bboard From: Mario.Barbacci@A.SEI.CMU.EDU Newsgroups: net.announce.arpa-internet Subject: Call for Papers Message-ID: <1986.1.12.1.49.12.Mario.Barbacci@a.sei.cmu.edu> Date: Sat, 11-Jan-86 20:58:59 EST Article-I.D.: a.1986.1.12.1.49.12.Mario.Barbacci Posted: Sat Jan 11 20:58:59 1986 Date-Received: Sat, 1-Feb-86 20:27:37 EST Sender: jason@ucbvax.BERKELEY.EDU Organization: The ARPA Internet Lines: 36 Approved: arpa-bboard@mc.lcs.mit.edu IFIP Workshop Architectural Synthesis of Digital Systems Torino, Italy, 22-23 May 1986 Sponsored by IFIP Working Group 10.2 and Organized by CSELT (Centro Studi E Laboratory Telecomunicazioni). The aim of the workshop is to bring together experts from university and industry actively working in Architectural Synthesis of Digital Systems. Presentations and discussions will cover the following topics: - CAD tools for architectural synthesis of VLSI systems - VLSI algorithms - Complexity theory and VLSI models of computation - Synthesis methodologies and techniques - Logic synthesis - Testability aspects during the synthesis process - Use of transformation techniques - Optimization techniques The number of attendants will be limited. To encourage a free exchange of ideas, no proceedings will be published. If you would like to participate, write to the conference Chairperson, including a short abstract of current activities and interests. Deadline for abstracts: February 28, 1986 Conference Chairperson: Mr. Girolamo de Vincentiis CSELT via Reiss Romoli 274 10148 Torino, ITALY Telephone: (39) 11 21691 Telex: 220539