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From: brooks@lll-crg.ARpA (Eugene D. Brooks III)
Newsgroups: net.arch
Subject: Re: IBM RT PC, 801, RISC horserace, etc.
Message-ID: <1220@lll-crg.ARpA>
Date: Wed, 29-Jan-86 15:21:36 EST
Article-I.D.: lll-crg.1220
Posted: Wed Jan 29 15:21:36 1986
Date-Received: Sat, 1-Feb-86 01:52:40 EST
References: <1328@sdcsvax.UUCP> <5100001@ccvaxa> <449@hoptoad.uucp>
Reply-To: brooks@lll-crg.UUCP (Eugene D. Brooks III)
Organization: Lawrence Livermore Labs, CRG Group
Lines: 12

In article <449@hoptoad.uucp> gnu@hoptoad.uucp (John Gilmore) writes:
>It's not clear whether RISC is a win or not -- we'll only see after
>they've been in the marketplace for a few years.  It *is* an
>interesting idea; the catch is software.  Can a complicated compiler
>generate correct code that is faster than what a very very smart
>microcode author could write and put into a non-RISC machine?  Indeed,
>the microcode has to do more work (decode instructions, etc) but the
>human is smarter than the compiler.  It's a horse race.

The RISC development to watch is the Clipper chip set from Fairchild.
It is more up to date technology, has on chip floating point and seperate
single chip cache and memory management support.