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From: jer@peora.UUCP (J. Eric Roskos)
Newsgroups: net.arch
Subject: Re: IBM RT PC, 801, RISC horserace, etc.
Message-ID: <1950@peora.UUCP>
Date: Fri, 31-Jan-86 08:40:59 EST
Article-I.D.: peora.1950
Posted: Fri Jan 31 08:40:59 1986
Date-Received: Sat, 1-Feb-86 06:47:10 EST
References: <1328@sdcsvax.UUCP> <5100001@ccvaxa> <449@hoptoad.uucp>
Organization: Concurrent Computer Corporation, Orlando, Fl
Lines: 20

> Indeed, the microcode has to do more work (decode instructions, etc) but
> the human is smarter than the compiler.  It's a horse race.

Actually, in some microprogrammed machines, there are hardware assists for
instruction decoding, so that all the microcode has to do is actually
execute the instruction, not decode it.  In such machines, the hardware
decodes the instruction, sets up the operand addresses, looks up a
starting address in a table based on the opcode, and starts the
microprogram sequencer at the address it found in the table.

However, you then have a tradeoff between speed and generality -- the
machine is faster because it doesn't have to decode the instructions,
but if you want a different instruction format, it's harder to do...

Some of our earlier machines (e.g., the 3220) worked that way; I don't know
anything about the current ones, though.
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