Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP
Posting-Version: version B 2.10.3 4.3bsd-beta 6/6/85; site decwrl.DEC.COM
Path: utzoo!watmath!clyde!burl!ulysses!bellcore!decvax!decwrl!dec-rhea!dec-katie!crabb
From: crabb@katie.DEC (Charlie Crabb HLO2-2/G13 SEG/CAD -dtn 225-5739)
Newsgroups: net.arch
Subject: Fairchild Clipper
Message-ID: <840@decwrl.DEC.COM>
Date: Fri, 31-Jan-86 10:16:49 EST
Article-I.D.: decwrl.840
Posted: Fri Jan 31 10:16:49 1986
Date-Received: Sat, 1-Feb-86 07:38:03 EST
Sender: daemon@decwrl.DEC.COM
Organization: Digital Equipment Corporation
Lines: 8

>The RISC development to watch is the Clipper chip set from Fairchild.
>It is more up to date technology, has on chip floating point and seperate
>single chip cache and memory management support.

	This chip set has been talked about for some time.  Does anyone
	know of its status, and is there any info on its architecture?

	/Charlie Crabb  crabb%katie.dec@decwrl.arpa