Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!watmath!clyde!burl!ulysses!bellcore!decvax!genrad!panda!talcott!harvard!seismo!rochester!pt.cs.cmu.edu!ius2.cs.cmu.edu!ralphw From: ralphw@ius2.cs.cmu.edu (Ralph Hyre) Newsgroups: net.micro Subject: Re: IBM RT: first impressions Message-ID: <296@ius2.cs.cmu.edu> Date: Fri, 7-Feb-86 23:38:39 EST Article-I.D.: ius2.296 Posted: Fri Feb 7 23:38:39 1986 Date-Received: Wed, 12-Feb-86 07:27:35 EST References: <1400012@orstcs.UUCP> Organization: Carnegie-Mellon University, CS/RI Lines: 25 In article <1400012@orstcs.UUCP> nathan@orstcs.UUCP (nathan) writes: >memory additions come in 2Meg chunks and there's only room for two >memory cards. It uses a PC-AT peripheral bus (it's not clear whether >memory rides there too) where disk controllers, graphics boards, >and network interfaces go. RT-PC memory sits on the fast (RT-only) bus, but the disk controller sits on the AT bus. Current versions of the disk system don't provide for DMA, apparently due to the I/O Channel Controller not being able to request DMA through the Memory Management unit. Everybody here is saying that IBM used a fairly conservative technology (2-micron NMOS) for the RISC chip, so future performance enhancements are possible/likely. The RT bus and RISC chip are designed to support multiple processors (bus has TAG bits to identify the device a request came from, and processor has set & test bit instruction) It appears to be a well executed machine - Sun and company are probably worried about the RT-PC-2 It's too bad the put the keyboard's escape key in the wrong place again, it lives up there among the function keys, above the main keyboard. -- - Ralph W. Hyre, Jr. Internet: ralphw@c.cs.cmu.edu (cmu-cs-c.arpa) Usenet: ralphw@mit-eddie.uucp Fido: Ralph Hyre at Net 129, Node 0 (Pitt-Bull) Phone: (412)CMU-BUGS