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From: radford@calgary.UUCP (Radford Neal)
Newsgroups: net.micro.mac
Subject: Re: Re: Hyperdrive 2000 info from GCC
Message-ID: <113@calgary.UUCP>
Date: Tue, 4-Feb-86 18:48:53 EST
Article-I.D.: calgary.113
Posted: Tue Feb  4 18:48:53 1986
Date-Received: Wed, 5-Feb-86 09:23:48 EST
References: <412@sol1.UUCP> <290@ius2.cs.cmu.edu> <263@tolerant.UUCP>
Organization: University of Calgary, Calgary, Alberta
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> 	I would think that the 16Mhz 68020 would actually break less software
> than the 12Mhz 68000, since it has a superset of the 68K instruction set and
> the double speed clock should be significantly easier to drop down to 8Mhz
> when absolutely necessary.  The only that should be timing dependent anyway
> is copy protection code that does it's own searching for file marks.
> -- 
> 
> 	David W. Berry

The instruction timing on a 68020 will not match that of a 68000 even at
the same clock rate, even if you add an extra wait state to bring its 
3 cycle memory accesses up to the 68000's 4 cycle accesses, even if you
disable its instruction cache. There's just no way, since, for example, a
shift instruction will be much faster due to the barrel shifter.

      Radford Neal