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From: mlopes@hhb.UUCP
Newsgroups: net.arch
Subject: Re: Addressing modes
Message-ID: <137@hhb.UUCP>
Date: Sun, 16-Feb-86 17:08:36 EST
Article-I.D.: hhb.137
Posted: Sun Feb 16 17:08:36 1986
Date-Received: Tue, 18-Feb-86 06:42:46 EST
Organization: HHB-Softron, Mahwah, NJ
Lines: 24


>	We are currently designing a RISC chip and are wondering how
>few addressing modes we can get away with.  Right now we have register
>direct and register indirect.  The question is, is this enough?  What do
>people as programmers and/or designers think is a minimum set of addressing
>modes?  We can get away with just these two (I hope!), but doing some things
>requires a lot of convoluted code.

Functionally, there is no problem with register direct and register indirect
as the only addressing modes.  Any other modes can be simulated with
them.  Immediate addressing would be simulated by allocating a memory
location for the immediate value, and loading its address into a register.
Now you you can use register indirect to load the value into another register.

A similar scheme can be used to simulate absolute addressing.  In this case,
the "immediate" value would be the absolute address.

All other fancier types of addressing can be simulated by address manipulation
within registers.

						Marco Lopes
						HHB-Systems
						Mahwah NJ
						philabs!hhb!mlopes