Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!linus!decvax!genrad!panda!talcott!harvard!seismo!mcvax!ukc!dcl-cs!craig From: craig@dcl-cs.UUCP (Craig Wylie) Newsgroups: net.arch Subject: Re: Addressing modes Message-ID: <993@dcl-cs.UUCP> Date: Mon, 17-Feb-86 06:32:01 EST Article-I.D.: dcl-cs.993 Posted: Mon Feb 17 06:32:01 1986 Date-Received: Wed, 19-Feb-86 07:41:30 EST References: <946@garfield.UUCP> Reply-To: craig@comp.lancs.ac.uk (Craig Wylie) Organization: Department of Computing at Lancaster University. Lines: 19 In article <946@garfield.UUCP> jeff1@garfield.UUCP (Jeff Sparkes) writes: > > We are currently designing a RISC chip and are wondering how >few addressing modes we can get away with. Right now we have register >direct and register indirect. The question is, is this enough? What do >people as programmers and/or designers think is a minimum set of addressing >modes? We can get away with just these two (I hope!), ... Dosn't the Inmos Transputer get away with one mode ? (Everything is an address?) Craig. -- UUCP: ...!seismo!mcvax!ukc!dcl-cs!craig| Post: University of Lancaster, DARPA: craig%lancs.comp@ucl-cs | Department of Computing, JANET: craig@uk.ac.lancs.comp | Bailrigg, Lancaster, UK. Phone: +44 524 65201 Ext. 4146 | LA1 4YR Project: Cosmos Distributed Operating Systems Research