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From: ludemann@ubc-cs.UUCP (Peter Ludemann)
Newsgroups: net.arch
Subject: Re: Addressing modes
Message-ID: <168@ubc-cs.UUCP>
Date: Wed, 19-Feb-86 11:14:43 EST
Article-I.D.: ubc-cs.168
Posted: Wed Feb 19 11:14:43 1986
Date-Received: Wed, 19-Feb-86 12:45:21 EST
References: <946@garfield.UUCP> <3421@nsc.UUCP> <1404@gitpyr.UUCP> <175@oasys.UUCP> <2213@phri.UUCP>
Reply-To: ludemann@ubc-cs.UUCP (Peter Ludemann)
Organization: UBC Department of Computer Science, Vancouver, B.C., Canada
Lines: 25
Keywords: indirection bit, Nova, 1620

In article <2213@phri.UUCP> roy@phri.UUCP (Roy Smith) writes:
>	I understand that every address in the DG Nova used one bit (the
>sign bit, I guess) to indicate indirection.  The indirect addressing mode
>was not decoded as part of the instruction, but as part of the address.  As
>long as the address you fetched had the indirect bit set, the machine kept
>doing another level of indirection.
>
>	I think that the CPU only checked for interrupts at the completion
>of an instruction.  You could generate an infinite indirection loop (two
>addresses which point to each other) and there was no way to halt the CPU
>short of pulling the plug.

A friend of mine programmed one of these.  It had the delightful "feature"
that references to non-existing memory returned data which included the
indirection bit on.  So the first invalid address put the machine into
a tight loop.

Old timers may recall that the IBM 1620 (a decimal machine) had an indirection
bit and also variable sized numbers (there was another bit on each digit
to indicate the end of the number).
-- 
-- Peter Ludemann
	ludemann@ubc-cs.uucp (ubc-vision!ubc-cs!ludemann)
	ludemann@cs.ubc.cdn  (ludemann@cs.ubc.cdn@ubc.mailnet)
	ludemann@ubc.csnet   (ludemann%ubc.csnet@CSNET-RELAY.ARPA)