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From: bcase@amdcad.UUCP (Brian case)
Newsgroups: net.arch
Subject: Re: Addressing modes
Message-ID: <9771@amdcad.UUCP>
Date: Fri, 21-Feb-86 12:22:19 EST
Article-I.D.: amdcad.9771
Posted: Fri Feb 21 12:22:19 1986
Date-Received: Mon, 24-Feb-86 05:43:43 EST
References: <187@anwar.UUCP> <1441@gitpyr.UUCP>
Organization: AMDCAD, Sunnyvale, CA
Lines: 14
Keywords: conditionality, universal
Summary: All Acorn RISC instructions are conditional

In article <1441@gitpyr.UUCP>, kludge@gitpyr.UUCP (Scott Dorsey) writes:
> impossible.  So, just set one (or two) bits of every instruction aside to make
> it possible to conditionally execute any instruction.  Is it worth the trouble

Welllllll, the Acorn RISC has this feature, and there was some work
done by a student at UCSD on this very subject (I can get references
if anyone is interested).  Some conditional branches can be eliminated
by this technique, thus making the observed path length of a program
longer; a longer path length can mean faster execution if a separate
path to instruction memory exists and that memory can support some
sort of burst mode access.  Anyway, branches are bad things to most
architectures, so eliminating some of them might yield better performance.

    bcase