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From: nather@utastro.UUCP (Ed Nather)
Newsgroups: net.arch
Subject: Re: RISC question
Message-ID: <431@utastro.UUCP>
Date: Wed, 26-Feb-86 11:24:50 EST
Article-I.D.: utastro.431
Posted: Wed Feb 26 11:24:50 1986
Date-Received: Sat, 1-Mar-86 04:26:25 EST
References: <2809@gatech.CSNET> <487@faron.UUCP>
Organization: U. Texas, Astronomy, Austin, TX
Lines: 29

In article <487@faron.UUCP>, bs@faron.UUCP (Robert D. Silverman) writes:
> Some of us feel that 32 bits is not enough, especially those of us who like
> to do a lot of integer arithmetic. 2^24 is not enough numerical precision for
> many applications. Personally I'd settle for a 1 MIP machine with 256 bit
> words and double length registers.  :-) :-)
> 
> Bob Silverman

Too small.  2e+256 is only 10e+77, or 10e+/-39 (about).  You might still
need floating point operations.  If, however, you are a little more generous
with word size, say 2048 bits, then a signed integer can represent a number
of 10e+/-340 in size, and you don't need any floating point operations in
either hardware or software.  Just use integers for everything.

Too slow.  If all operations are integer functions, the computing machine
should be at least 10 mips with modern hardware technology, and simple to
boot.  (er ... simple as well.)

Also, with 2048-bit words, you don't need an instruction cache, since each
word can hold a whole slew of instructions -- each instruction is its own
cache.  Of course, a 2048-bit-wide bus may pose a design problem, but what
the hell -- we don't worry about engineering details on the net; we just set
policy.

-- 
Ed Nather
Astronomy Dept, U of Texas @ Austin
{allegra,ihnp4}!{noao,ut-sally}!utastro!nather
nather@astro.UTEXAS.EDU