Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!linus!decvax!decwrl!glacier!mips!kim From: kim@mips.UUCP (Kim DeVaughn) Newsgroups: net.arch Subject: Re: IBM 370 TOD clock resolution Message-ID: <368@mips.UUCP> Date: Sun, 2-Mar-86 06:26:49 EST Article-I.D.: mips.368 Posted: Sun Mar 2 06:26:49 1986 Date-Received: Tue, 4-Mar-86 04:24:51 EST References: <561@hoptoad.uucp> <5058@alice.uUCp> Organization: mips ... where RISC is a way of life Lines: 48 > > Before you call that a hack, see what the Amdahl 470 V/6 did. It just > > delayed the STCK instruction until the clock ticked. I believe the > > clock ticked every 52 cycles or something, so the STCK instruction had > > an "average" execution time of 26 clocks, depending when you tried versus > > when it last ticked. > > That seems silly. The low-order bit of the IBM TOD clock represents > one microsecond. Surely you're not saying that the V/6 can execute > 52 million STCK instructions per second? The architecture of the 370 thru 309x machines defines the TOD clock to appear as 64 bit register where bits 0-51 are significant to the TOD function. Bit 51 (remember bits are numbered big-endian) is defined to increment at the 1us. rate. Also, "Two executions of STORE CLOCK, possibly on different CPUs in the same configuration, always store different values if the clock is running". And, "The values stored for a running clock always correctly imply the sequence of execution of STORE CLOCK ...". Finally, on UP systems, 0's are stored in bit positions 52-63 when STORE CLOCK is executed; on MP systems, non-zero values may be stored in these positions. What this means implementation-wise is that for an MP system, the value of a "free-running" counter (probably incremented at the machine's cycle rate) is stored in 52-63. Since STORE CLOCK performes a "serialization function" (oversimplification: "flush the pipe" in all CPU's) before the value of the clock is fetched, and again after the value is placed in storage, different CPU's will get unique values of the TOD-clock should "simultaneous" STORE CLOCK's be issued. For a UP machine, it is sufficient to interlock successive accesses to the TOD-clock until after bit 51 has been "ticked". It matters not to the OS if an application whats to burn-up it's time-slice performing such wasteful practices. Note that bit-positions 52-63 cannot be used for timing purposes, but may be used for "sequencing" purposes. /kim -- UUCP: {decvax,ucbvax,ihnp4}!decwrl!mips!kim DDD: 408-720-1700 USPS: MIPS Computer Systems Inc, 930 Arques Av, Sunnyvale, CA 94086