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From: aglew@ccvaxa.UUCP
Newsgroups: net.arch
Subject: Re: Addressing modes
Message-ID: <5100016@ccvaxa>
Date: Sat, 1-Mar-86 18:25:00 EST
Article-I.D.: ccvaxa.5100016
Posted: Sat Mar  1 18:25:00 1986
Date-Received: Tue, 4-Mar-86 04:46:30 EST
References: <1169@garfield.UUCP>
Lines: 11
Nf-ID: #R:garfield.UUCP:1169:ccvaxa:5100016:000:458
Nf-From: ccvaxa.UUCP!aglew    Mar  1 17:25:00 1986


> register indirect + 4 bit constant

4 bit constants hold only 20% of the offsets you're going to want, without
scaling, and only 30% with. These numbers are preliminary results of a
study I'm making. The distribution of the size of addressing constants
falls off roughly exponentially, with a 50% mark at 6 bits, and an 85% mark
at 8 bits.

What I'm trying to say is, you'll get much much better results if you provide
just a few more bits in the constant.