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From: herbie@polaris.UUCP (Herb Chong)
Newsgroups: net.arch
Subject: Re: IBM 370 TOD clock resolution
Message-ID: <466@polaris.UUCP>
Date: Mon, 3-Mar-86 16:02:17 EST
Article-I.D.: polaris.466
Posted: Mon Mar  3 16:02:17 1986
Date-Received: Fri, 7-Mar-86 05:11:49 EST
References: <561@hoptoad.uucp> <5058@alice.uUCp>
Reply-To: herbie@polaris.UUCP (Herb Chong)
Organization: IBM TJ Watson RC
Lines: 33
Summary: 

In article <5058@alice.uUCp> ark@alice.UucP (Andrew Koenig) writes:
>> Before you call that a hack, see what the Amdahl 470 V/6 did.  It just
>> delayed the STCK instruction until the clock ticked.  I believe the
>> clock ticked every 52 cycles or something, so the STCK instruction had
>> an "average" execution time of 26 clocks, depending when you tried versus
>> when it last ticked.
>
>That seems silly.  The low-order bit of the IBM TOD clock represents
>one microsecond.  Surely you're not saying that the V/6 can execute
>52 million STCK instructions per second?

quoting from page 4-18 of the IBM S/370 Extended Architecture Principles
of Operation (SA22-7085) as amended by TNL SN22-0682:

"In the basic form, the TOD clock is incremented by adding a one in bit
position 51 every microsecond.  In models having a higher or lower
resolution, a different bit position is incremented at such a frequency
that the rate of advancing the clock is the same as if a one were added
in bit position 51 every microsecond.  The resolution of the TOD clock
is such that the incrementing rate is comparable to the inctruction rate
of the model."

Herb Chong...

I'm still user-friendly -- I don't byte, I nybble....

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