Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Posting-Version: version B 2.10.2 9/17/84; site nbires.UUCP Path: utzoo!watmath!clyde!burl!ulysses!bellcore!decvax!decwrl!pyramid!hplabs!hao!nbires!rcd From: rcd@nbires.UUCP (Dick Dunn) Newsgroups: net.micro.68k Subject: Re: Timing loops Message-ID: <635@nbires.UUCP> Date: Fri, 28-Feb-86 04:43:26 EST Article-I.D.: nbires.635 Posted: Fri Feb 28 04:43:26 1986 Date-Received: Sun, 2-Mar-86 00:28:24 EST References: <3291@sun.uucp> Distribution: net Organization: NBI,Inc, Boulder CO Lines: 21 Talking about the nasties of correcting funky hardware by putting in software timing loops... >...then you write whatever it takes to work > (timing loop, simple assignment) and DOCUMENT THAT ASSUMPTION!!! > right there, right then, at that line, at the top - but make > it known to the next smuck. > > I dont mind someone pulling stunts if it's NECESSARY, or sometimes just > the way it is. (some are amusing, no?) I DO mind not knowing when it's > been done, and getting bit. 'nuff said? The sentiment is right, but that doesn't solve the problem. As whoever it was (from SUN) said, suppose that you switch to a processor that's functionally the same but has different timing. Sure--you comment the gotchas as best you can--but who's going to go looking for the comments that indicate, say, specific gotchas between a 16.67 and 20 Mhz 68020??? And how do you find them? Do you have a working ELCgrep (that's English- Language, Conceptual grep)? -- Dick Dunn {hao,ucbvax,allegra}!nbires!rcd (303)444-5710 x3086 ...Worst-case analysis must never begin with "No one will ever want..."