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From: jack@boring.uucp (Jack Jansen)
Newsgroups: net.arch,net.micro.mac,net.micro.68k
Subject: Re: timing loops
Message-ID: <6790@boring.UUCP>
Date: Sat, 22-Feb-86 13:05:02 EST
Article-I.D.: boring.6790
Posted: Sat Feb 22 13:05:02 1986
Date-Received: Wed, 26-Feb-86 03:54:43 EST
References: <156@motatl.UUCP> <530@hoptoad.uucp> <6780@boring.UUCP> <9645@amdcad.UUCP>
Reply-To: jack@mcvax.UUCP (Jack Jansen)
Organization: AMOEBA project, CWI, Amsterdam
Lines: 32
Xref: linus net.arch:2403 net.micro.mac:4809 net.micro.68k:1448
Apparently-To: rnews@mcvax

In article <9645@amdcad.UUCP> jimb@amdcad.UUCP (Jim Budler) writes:
>In article <6780@boring.UUCP> I wrote:
>>...
>>Sorry, but this bad makes it a particularly *bad* USART chip, regardless
>>of any other features.
>>Imagine writing a device driver for it, finding out that the C compiler
>>generates such code that there's far more than 2.2us between writes, and
>>leaving the place. Then, two years later, the site gets a new C compiler
>>with a much better optimizer..........
>
>Sorry, but this sounds like a bad device driver to me, not a bad device.
>Depending on a poor C compiler for timing is just as bad as depending
>on any other non-portable 'feature' of a C compiler.  The device driver 
>could be broken by a new C compiler in any of a few thousand other
>ways.

The point here is that, even if you notice the small print in
the datasheet, you look at your driver and say "oh, there's
more than enough time in between writes", and forget about the
whole timing constraint in five minutes.

You're right that the driver could be broken in thousands of ways
by a new compiler, but this is *not* due to the driver, it is
due to the *device*.

There is no way you'll write a device driver that is guaranteed
to work with any C compiler, if you have to take care of timing
considerations (unless you're willing to pay the penalty of using
a *real* timer, of course).
-- 
	Jack Jansen, jack@mcvax.UUCP
	The shell is my oyster.