Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!watmath!clyde!burl!ulysses!allegra!mit-eddie!think!harvard!seismo!brl-adm!brl-smoke!ron From: ron@brl-smoke.ARPA (Ron Natalie ) Newsgroups: net.arch,net.micro.mac,net.micro.68k Subject: Re: timing loops Message-ID: <1361@brl-smoke.ARPA> Date: Thu, 27-Feb-86 05:16:23 EST Article-I.D.: brl-smok.1361 Posted: Thu Feb 27 05:16:23 1986 Date-Received: Sun, 2-Mar-86 19:35:43 EST References: <156@motatl.UUCP> <530@hoptoad.uucp> <2795@amdahl.UUCP> <221@myrias.UUCP> <2817@amdahl.UUCP> <689@well.UUCP> Distribution: net Organization: Ballistic Research Lab (BRL) Lines: 17 Xref: watmath net.arch:2682 net.micro.mac:4939 net.micro.68k:1536 > In article <2817@amdahl.UUCP> mat@amdahl.UUCP (Mike Taylor) writes: > >(S/370 architecturally has 244 picosecond resolution) > > I admit to knowing little about the S/370, but a 4 GHz clock rate? > Can someone verify this, please? I don't remember seeing any microwave > plumbing in a 370... :-) > Who said anything about a 4Ghz clock rate? All he said was the architecture supported that resolution. If the 370 time register were incremented by one, it would be updated every 244 picoseconds. However each machine in the line increments it by a somewhat larger number corresponding to the speed of the clock on that processor. Hence, the higher order bits have been consistant accross 10 years of processors and will continue to be so for quite a few years to come I would expectr. -Ron