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From: billw@Navajo.ARPA (William E. Westfield)
Newsgroups: net.arch
Subject: Re: RISC cache vs CISC u-code
Message-ID: <416@Navajo.ARPA>
Date: Thu, 6-Mar-86 01:35:17 EST
Article-I.D.: Navajo.416
Posted: Thu Mar  6 01:35:17 1986
Date-Received: Sat, 8-Mar-86 02:17:32 EST
References: <136@pyramid.UUCP>
Organization: Stanford University
Lines: 41
Summary: RISC is not a new idea, and memory.


Hey, look everybody - no one is claiming that computers with simple
instruction sets are a new idea - nearly all processors invented a
sufficeintly long time ago have nice simple instruction schemes, so as
to make hardware implementation easier (remember, there wasn't always
microcode!).  The original PDP8 (a 12 bit computer), PDP11s (that
everyone knows and loves), and the PDP6 (DECs original 36 bit machine,
with essentially the same instuction set as a DEC10/20, was built of
approximately 3000 gates) all were RISCy in there own ways.  So are
8008's, 8080's, 1802's, 6800's, 6502's, and the rest of your "first
generation" microprocessors.

  What the RISC people did is essentially say "look guys, its all very
nice that transistors are smaller now, and you have microcode and
nanocode and all that and thik that you can come close to implementing
a high level language right on the chip.  Unfortunately, almost isn't
good enough, and trying to write a compiler that takes advantage of a
chip that "almost" implements something is much worse than writing a
compiler for something that doesn't do so at all.  In fact, we aren't
sure we know enough about code generation to take advantage of even the
simple addressing modes on something like a PDP11.  We'de really be
happy if the machine could just do this, that, and the other thing,
only do it real fast.  then our compiler could be simple, and easier to
move to faster processors, and this study here shows that it is likely
to come out working faster anyway..." 

In short, "RISC" is a reaction to the fact that hardware is advancing
faster than software technology, and hardware designers who thought
they understood software really didin't.

With respect to there being less availble DMA cycles in a RISC machine,
this is true.  On the other hand, they say, allocate a bunch of memory
dedictaed to device communications, or just use faster memory.
Mass memory is about 10 times faster than it was 10 years ago,
and 10^n times cheaper.  Software has improved in that time too,
but not anywhere near as much.

glacier!navajo!billw

[DEC should put the 20 on a chip, call it a risc machine, and sell
 systems for 15K.  They'd be very successful.]