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From: mash@mips.UUCP (John Mashey)
Newsgroups: net.arch
Subject: Re: RISC question
Message-ID: <387@mips.UUCP>
Date: Sun, 9-Mar-86 19:34:59 EST
Article-I.D.: mips.387
Posted: Sun Mar  9 19:34:59 1986
Date-Received: Wed, 12-Mar-86 22:01:10 EST
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John Hall writes:
> Is there some reason that RISC machines require cache to operate? 

No. The IBM ROMP (in the PC/RT) is tuned for cacheless operation.  IBM's
nice book about the RT explains the tradeoffs made in going from the
cache-oriented 801 to the ROMP.
> 
> Are the benefits of cache greater for RISC architectures?
Sometimes.  In particular, a carefully tuned RISC design can fetch from
an I-cache every single machine cycle, and if you do that, things like
pre-fetch or translated intruction queues can go away.
> 
> I guess I see cache as an architectural feature separate from the
> RISC-iness of a machine's instructions set.
Yes.
> 
> Indeed, many modern computers incorporate both RISC instruction sets and
> cache memories.  Is this cause and effect, or are these merely two
> good ideas that are being used in the same machine?
Almost any high-performance system (except, perhaps, vector systems)
ends up having to use caches to get reasonable cost-performance.
> 
> Why wouldn't cache benefit a CISC machine?
> 
> For single-chip designs, given a particular die-size and line width it
> is easier to find room for on-chip cacheing with a RISC design.  (Of
> course, the extra space could also be used for a huge register file,
> another "RISC characteristic" that seems to be equally applicable to
> CISC designs.). 
> 
> Are we muddying the waters by lumping a bunch of good ideas:
>    - Reduced instruction sets
>    - Large register files
>    - Multi-layer cache
> all into the category of RISC?

1) It is not clear that on-chip caching is a good idea with the current
level of technology.  To be more specific, with 2 micron CMOS, you can get
enough cache (like 256 bytes) to be an SBA ("SMall Benchmark Accelerator").

2) The waters are certainly muddied, since lots of people have different ideas
of what RISC is supposed to be.
-- 
-john mashey
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