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From: rshepherd@euroies.UUCP (Roger Shepherd INMOS)
Newsgroups: net.arch
Subject: Re: RISC question
Message-ID: <250@euroies.UUCP>
Date: Mon, 10-Mar-86 08:07:19 EST
Article-I.D.: euroies.250
Posted: Mon Mar 10 08:07:19 1986
Date-Received: Sat, 15-Mar-86 22:32:56 EST
References: <2809@gatech.CSNET>
Organization: University College Dublin
Lines: 27

The problem with 24-bit machines (and 40, 48 ...) is that
they do not have a power of two bytes in a 
word. This makes byte addressing tricky. This problem can be overcome by
very careful design and the separation of address arithmetic and integer
arithmetic (for instance). In the transputer we separate a pointer into
two halves, a word address and a byte selector (enough bits, ie 1 for
16-bit machine, 2 for 24-bit machine, 2 for 32-bit machine ...). The effect
of addressing arithmetic is then to to generate a new pointer using
only BytesPerWord values in the byte selector part.

For example the pointers to successive bytes in a 24-bit machine would 
look like (if interpreted as integers)

	0	-- assuming we astart out addressing at zero
	1
	2
	4
	5
	6
	8

Of course with this scheme 16-bit and 32-bit machines have pointers w
which appear entirely normal.
-- 
Roger Shepherd, INMOS Ltd, Whitefriars, Lewins Mead, Bristol, BS1 2NP, UK
Tel: +44 272 290861
UUCP: ...!mcvax!euroies!rshepherd