Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!watmath!clyde!burl!ulysses!bellcore!decvax!linus!philabs!cmcl2!harvard!seismo!mcvax!boring!jack From: jack@boring.uucp (Jack Jansen) Newsgroups: net.arch Subject: Re: What is MIL-STD-1750A? - (nf) Message-ID: <6830@boring.UUCP> Date: Thu, 13-Mar-86 18:21:26 EST Article-I.D.: boring.6830 Posted: Thu Mar 13 18:21:26 1986 Date-Received: Sun, 16-Mar-86 10:45:49 EST References: <1080@terak.UUCP> <2900007@ztivax.UUCP> Reply-To: jack@mcvax.UUCP (Jack Jansen) Organization: AMOEBA project, CWI, Amsterdam Lines: 14 Apparently-To: rnews@mcvax In article <2900007@ztivax.UUCP> david@ztivax.UUCP writes: >1750 is a 16-bit processor architecture standard. > ... Virtually every register >(16?) can be used for virtually any instruction. As I remember (it >has been 7 years now), there is not even a dedicated stack pointer, >and call/return needs to say which register to use as sp. > Hmm. If this is true, how are interrupts handled? Do you specify the stackpointer in the vector? Does the machine pick a register at random:-)? -- Jack Jansen, jack@mcvax.UUCP The shell is my oyster.